A wiring board with insulating layers and wiring layers alternately laminated may be warped due to a difference in the coefficient of thermal expansion between the insulating layer and the wiring layer. Examples of related art for suppressing occurrence of warpage in the wiring board are as follows.
There is a technique in which, in a multilayered wiring board including wiring layers with a power supply plane formed thereon, the power supply plane is cut and divided along a cutting line, for example. It is also suggested that the cutting line is a zigzag line.
Moreover, there is a technique in which, in a printed wiring board configured of a circuit main body portion where a wiring pattern is formed and a waste board portion, hexagonal dummy patterns are arrayed in a honeycomb shape on the waste board section so as to be regularly spaced, thereby matching the residual copper rates of the circuit main body portion and the waste board portion. It is also suggested that dummy patterns of adjacent layers are arranged so as to be shifted in longitudinal and lateral directions by a half pitch.
Moreover, there is a technique in which, in a board base material sectioned into a product formation region and a waste board region, a reinforcing pattern with element patterns successively and regularly arranged thereon is formed on the waste board region.
Japanese Laid-open Patent Publication Nos. 2009-76721, 8-51258, and 2008-4631 are examples of related art.